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| INTEGRATED CIRCUITS CBT3857 10-bit bus switch with 10 k pull-down termination resistors Product specification Supersedes data of 1998 Dec 10 1999 Sep 14 Philips Semiconductors Philips Semiconductors Product specification 10-bit bus switch with 10 k pull-down termination resistors CBT3857 FEATURES * Enable signal is SSTL_2 compatible * Optimized for use in Double Data Rate (DDR) SDRAM applications DESCRIPTION This 10-bit bus switch is designed for 3 V to 3.6 V VCC operation and SSTL_2 output enable (OE) input levels. When OE is LOW, the 10-bit bus switch is on and port A is connected to port B. When OE is HIGH, the switch is open, and a high-impedance state exists between the two ports. The low on-state resistance of the switch allows connections to be made with minimal propagation delay. The CBT3857 is characterized for operation from 0C to +85C. * Flow-through architecture optimizes PCB layout * Designed to be used with 200 Mbps * Switch on resistance is designed to eliminate the need for series resistor to DDR SDRAM * Internal 10 k pull-down resistors on B port * Internal 50 k pull-up resistor on output enable input * Full DDR solution provided when used with SSTL16857 and PCK857 * Latch-up protection exceeds 500 mA per JESD78 * ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per JESD22-A115 and 1000 V CDM per JESD22-C101 QUICK REFERENCE DATA SYMBOL tPLH tPHL CIN COUT ICCZ PARAMETER Propagation delay An to Yn Input capacitance Output capacitance Total supply current CONDITIONS Tamb = 25C; GND = 0 V CL = 30 pF; VCC = 3.3 V VI = 0 V or VCC Outputs disabled; VO = 0 V or VCC VCC = 3.6 V TYPICAL 720 2.8 6.4 1 UNIT ps pF pF mA ORDERING INFORMATION PACKAGES 24-Pin Plastic TSSOP Type I TEMPERATURE RANGE 0C to +85C ORDER CODE CBT3857 PW DWG NUMBER SOT355-1 PIN CONFIGURATION PIN DESCRIPTION PIN NUMBER 1 2, 3, 4, 5, 6, 7, 8, 9, 10, 11 12 22, 21, 20, 19, 18, 17, 16, 15, 14, 13 23 24 SYMBOL VREF A1-A10 GND B1-B10 OE VCC NAME AND FUNCTION Reference output voltage Inputs Ground (V) Outputs Output enable Positive supply voltage VREF A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 GND 1 2 3 4 5 6 7 8 9 10 11 12 24 23 Vcc OE 22 21 20 19 18 17 16 15 14 13 1999 Sep 14 II B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 FUNCTION TABLE INPUT OE L H H = High voltage level L = Low voltage level FUNCTION A port = B port Disconnect SA00516 2 853-2168 22329 Philips Semiconductors Product specification 10-bit bus switch with 10 k pull-down termination resistors CBT3857 LOGIC DIAGRAM (POSITIVE LOGIC) SIMPLIFIED SCHEMATIC, EACH FET SWITCH A1 2 SW RINT 22 B1 A B 11 A10 SW RINT 13 B10 OE OE VREF 23 1 SA00518 SA00517 ABSOLUTE MAXIMUM RATINGS1, 3 SYMBOL VCC IIK VI Tstg VI PARAMETER DC supply voltage DC input clamp current DC input voltage range (OE only)2 Storage temperature range DC input voltage range (except OE)2 VI/O < 0 CONDITIONS RATING -0.5 to +4.6 -50 VCC + 0.5 -65 to 150 -0.5 to 4.6 UNIT V mA V C V NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 3. The package thermal impedance is calculated in accordance with JESD 51. RECOMMENDED OPERATING CONDITIONS SYMBOL VCC VREF VIH VIL VIH VIL Tamb DC supply voltage Reference voltage (0.38 x VCC) AC high-level input voltage AC low-level Input voltage DC high-level input voltage DC low-level Input voltage Operating free-air temperature range 0 VREF + 180 mV VREF - 180 mV +85 PARAMETER LIMITS Min 3 1.15 VREF + 350 mV VREF - 350 mV Typ 3.3 1.25 Max 3.6 1.35 UNIT V V V V V V C NOTE: 1. All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. 1999 Sep 14 3 Philips Semiconductors Product specification 10-bit bus switch with 10 k pull-down termination resistors CBT3857 DC ELECTRICAL CHARACTERISTICS LIMITS SYMBOL VIK PARAMETER Input clamp voltage TEST CONDITIONS VCC = 3 V; II = -18 mA OE II Input leakage current VCC = 3 6 V; VI = VCC or GND 3.6 A Port B Port VREF ICC CI CiO(OFF) ron2 roff2 Quiescent supply current Control pins Power-off leakage current On-resistance Off-resistance VCC = 3.6 V; IO = 0, VI = VCC or GND VI= 3 V or 0 VO = 3 V or 0; OE = VCC VCC = 3 V to 3.6 V; VA = 0.8 V; VB = 1.15 V VCC = 3 V to 3.6 V; VA = 1.7 V; VB = 1.35 V VCC = 3 V to 3.6 V; VI = 1.25 V; II = 10 mA VCC = 3 V to 3.6 V; VI = 1.65 V 20 20 20 1 0.73 0.1 20 0.1 0.7 2.8 6.4 24 24 24 30 30 30 M Tamb = 0C to +85C Min Typ1 Max -1.2 500 1 500 1 1.5 V A A A A mA pF pF UNIT NOTES: 1. All typical values are at VCC = 3.3 V, Tamb = 25C 2. Measured by the voltage drop between the A and the B terminals at the indicated current through the switch. On-state resistance is determined by the lowest voltage of the two (A or B) terminals. AC CHARACTERISTICS SYMBOL tpd ten tdis PARAMETER Propagation delay1 enable disable FROM (INPUT) A or B OE OE TO (OUTPUT) B or A A or B A or B 1 1 VCC = +3.3 V 0.3 V Min Max 750 3 3 UNIT ps ns ns NOTE: 1. The propagation delay is based on the RC time constant of the typical on-state resistance of the switch and a load capacitance, when driven by an ideal voltage source (zero output impedance); 24 x 30 pF. 184/200-pin DDR SDRAM DIMM SDRAM SDRAM SDRAM SDRAM SDRAM SDRAM SDRAM SDRAM SDRAM BACK SIDE CBT CBT CBT CBT CBT CBT CBT CBT CBT CBT3857 (9) SDRAM SDRAM SDRAM SDRAM SDRAM SDRAM SDRAM SDRAM FRONT SIDE SSTL16857 SSTL16857 PCK857 The PLL clock distribution device and SSTL registered drivers reduce signal loads on the memory controller and prevent timing delays and waveform distortions that would cause unreliable operation SDRAM SW00393 1999 Sep 14 4 Philips Semiconductors Product specification 10-bit bus switch with 10 k pull-down termination resistors CBT3857 AC WAVEFORMS VM = 1.5 V, VIN = GND to 3.0 V 2.75 V 1.375V INPUT 0V tPLH tPHL VOH 1.25V OUTPUT VOL 1.25V 1.375V TEST CIRCUIT AND WAVEFORMS 4.3 V From Output Under Test CL = 30 pF 500 S1 Open GND 500 Load Circuit TEST tpd tPLZ/tPZL tPHZ/tPZH S1 open 4.3 V GND SA00513 Waveform 1. Input (An) to Output (Yn) Propagation Delays DEFINITIONS Load capacitance includes jig and probe capacitance CL = VIH (AC) Output Control (Low-level enabling tPZL Output Waveform 1 S1 at 4.3 V (see Note) tPZH Output Waveform 2 S1 at Open (see Note) * SA00515 VREF tPLZ VREF VIL (AC) 3.5V 1.25 V tPHZ VOH - 0.15V 1.25 V 0V NOTES: 1. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO = 50 , tr 2.5 ns, tf 2.5 ns. 2. The outputs are measured one at a time with one transition per measurement. VOL + 0.15V VOL VOH Note: Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. * VIH = 3.0V with 25 input line impedance SA00514 Waveform 2. 3-State Output Enable and Disable Times 1999 Sep 14 5 Philips Semiconductors Product specification 10-bit bus switch with 10 k pull-down termination resistors CBT3857 TSSOP24: plastic thin shrink small outline package; 24 leads; body width 4.4 mm SOT355-1 1999 Sep 14 6 Philips Semiconductors Product specification 10-bit bus switch with 10 k pull-down termination resistors CBT3857 NOTES 1999 Sep 14 7 Philips Semiconductors Product specification 10-bit bus switch with 10 k pull-down termination resistors CBT3857 Data sheet status Data sheet status Objective specification Preliminary specification Product specification Product status Development Qualification Definition [1] This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. Production [1] Please consult the most recently issued datasheet before initiating or completing a design. Definitions Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support -- These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088-3409 Telephone 800-234-7381 (c) Copyright Philips Electronics North America Corporation 1999 All rights reserved. Printed in U.S.A. Date of release: 09-99 Document order number: 9397-750 -06413 Philips Semiconductors 1999 Sep 14 8 |
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